CAN Data Management
The four independent CAN nets according to ISO 11898-1 are driven by the esd Advanced CAN Core (esdACC) CAN controller implemented in the Xilinx Spartan 3e FPGA. Controlled by the FPGA the PMC-CAN/400-4 supports bus mastering as an initiator, meaning that it is capable of initiating write cycles to the host CPUs RAM independent of the CPU or the system DMA controller. This results in a reduction of overall latency on servicing I/O transactions in particular at higher data rates and reduced host CPU load. The PMC-CAN/400-4 provides high resolution hardware timestamps.
IRIG-B
The optional IRIG-B interface offers inputs for analog or RS-422 IRIG-B coded signals. Both are electrically isolated. IRIG-B evaluation is controlled by an additional microcontroller.
Software Support
CAN layer 2 (NTCAN-API) software drivers are available for Windows, Linux, VxWorks, QNX, RTX and On Time RTOS-32.
Libraries for the higher layer protocols CANopen, J1939 and ARINC825 are available.
Additional free-of-charge esd CAN tools for Windows offer efficient setup and analysis of CAN applications and networks.
Customization on Request
Customized options are available for customized series production in reasonable quantities. Please contact our Sales Team for detailed information.
As customized solutions an extended temperature range version and a conduction cooled version of the PMC-CAN/400-4 are available on request.
Additionally, esd offers a VMEbus carrier board in conduction cooled design to carry up to two conduction cooled PMC boards..Drivers and software support for other operating systems are available on request.Check attachment for Software Support